例句與造句

1. In general, DCAS can be provided by a more expressive hardware transactional memory.
2. Hardware transactional memory systems may comprise modifications in processors, cache and bus protocol to support transactions.
3. Although hardware transactional memory provides maximal performance compared to software alternatives, limited use has been seen at this time.
4. Sun Microsystems implemented hardware transactional memory and a limited form of speculative multithreading in its high-end Rock processor.
5. It employs hardware transactional memory ( HTM ) which was originally proposed as a speculative memory access mechanism to boost the performance of multi-threaded applications.
6. It's difficult to find hardware transactional memory in a sentence. 用hardware transactional memory造句挺難的
7. Owing to the more limited nature of hardware transactional memory ( in current implementations ), software using it may require fairly extensive tuning to fully benefit from it.
8. In 2009, AMD proposed the Advanced Synchronization Facility ( ASF ), a set of x86 extensions that provide a very limited form of hardware transactional memory support.
9. They published their " experience with the hardware transactional memory ( HTM ) feature of two pre-production revisions of a new commercial multicore processor " in 2009.
10. Since version 3.9 . 0 there is support for Linux on AVX2 instructions, for Intel Transactional Synchronization Extensions, both RTM and HLE and initial support for Hardware Transactional Memory on POWER.
11. On 10 March 2009 Dave Dice, Yossi Lev, Mark Moir and Dan Nussbaum presented " Early Experience with a Commercial Hardware Transactional Memory Implementation " at the Fourteenth International Conference on Architectural Support for Programming Languages and Operating Systems ( ASPLOS'09 ).
12. On 5 April 2010, Dave Dice, Yossi Lev, Virendra Marathe, Mark Moir, Marek Olszewski and Dan Nussbaum released a paper " Simplifying Concurrent Algorithms by Exploiting Hardware Transactional Memory " to be presented at the 22nd ACM Symposium on Parallelism in Algorithms and Architectures ( SPAA 2010 ).
13. On 26 October 2009, Dave Dice, Yossi Lev, Mark Moir and Dan Nussbaum expanded a formerly published paper " Early Experience with a Commercial Hardware Transactional Memory Implementation " which was presented at the Fourteenth International Conference on Architectural Support for Programming Languages and Operating Systems ( ASPLOS'09 ).